1. Field of the Invention
The present invention relates to a memory structure, and particularly to a static random access memory unit cell structure (SRAM unit cell structure) and layout structure.
2. Description of the Prior Art
A static random access memory (SRAM) comprises a logic circuit and a static random access memory connected to the logic circuit. In a conventional memory unit cell structure manufacturing process, due to limitations in the lithography process, for forming metal-zero interconnects, which lengthwise direction may be referred to as a vertical direction, located on contacts and metal-zero interconnects, which lengthwise direction may be referred to as a horizontal direction, located on pairs of a contact and a gate line, twice microlithography and etching processes are required to respectively form trenches, subsequently the trenches are filled with metal, and then a chemical mechanical polishing (CMP) process is performed. In other words, in the processes, one microlithography and etch process is performed to form trenches arranged in a vertical direction, and another microlithography and etch process is performed to form trenches arranged in a horizontal direction. The intersection of the vertical and the horizontal trenches for forming metal-zero interconnects is the place subject to twice etching processes, such that a local erosion occurs in the deep of the substrate, and it may be referred to as “stitch”. In a worsen situation, such erosive stitch recess reaches diffusion regions to cause junction leakage, resulting in low yield. Such damage to the substrate is more serious in the SiGe technology.
Therefore, there is still a need for a novel SRAM unit cell structure to avoid the junction leakage.